static random-access memory - définition. Qu'est-ce que static random-access memory
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Qu'est-ce (qui) est static random-access memory - définition

SEMICONDUCTOR MEMORY THAT USES FLIP-FLOPS TO STORE EACH BIT
Static RAM; S-RAM; Static Random Access Memory; SRAM latency; RSNM; Read static noise margin; Static random access memory; Static storage; ESRAM; 6T SRAM; 6T SRAM cell; 6T RAM cell
  • A static RAM chip from a [[Nintendo Entertainment System]] clone (2K × 8 bits)
  • Four-transistor SRAM provides advantages in density at the cost of manufacturing complexity. The resistors must have small dimensions and large values.
  • A six-transistor CMOS SRAM cell. WL: word line. BL: bit line.
  • die]] of a STM32F103VGT6 [[microcontroller]] as seen by a [[scanning electron microscope]]. Manufactured by [[STMicroelectronics]] using a 180-[[nanometre]] process. Topology of the cells is clearly visible.

static random-access memory         
<storage> (SRAM) Random-access memory in which each bit of storage is a bistable flip-flop, commonly consisting of cross-coupled inverters. It is called "static" because it will retain a value as long as power is supplied, unlike dynamic random-access memory (DRAM) which must be regularly refreshed. It is however, still volatile, i.e. it will lose its contents when the power is switched off, in contrast to ROM. SRAM is usually faster than DRAM but since each bit requires several transistors (about six) you can get less bits of SRAM in the same area. It usually costs more per bit than DRAM and so is used for the most speed-critical parts of a computer (e.g. cache memory) or other circuit. (1995-04-22)
static RAM         
MDRAM         
  • [[MoSys]] MDRAM MD908
  • accessdate=2022-03-09}}</ref> (lower edge, right of middle).
  • 1 Mbit high speed [[CMOS]] pseudo static RAM, made by [[Toshiba]]
  • NMOS]] DRAM cell. It was patented in 1968.
  • die]] of a Samsung DDR-SDRAM 64MBit package
  • Inside a Samsung GDDR3 256&nbsp;MBit package
  • A 512 MBit [[Qimonda]] GDDR3 SDRAM package
  • Writing to a DRAM cell
RANDOM-ACCESS MEMORY THAT STORES EACH BIT OF DATA IN A SEPARATE CAPACITOR WITHIN AN INTEGRATED CIRCUIT
DRAM (memory); Pseudostatic RAM; PSRAM; Pseudostatic Random Access Memory; Window RAM; Dynamic RAM; EDO RAM; Fast Page Mode DRAM; FPM RAM; FPM DRAM; Fast Page Mode RAM; BEDO (RAM); MDRAM; Row Access Strobe; Column Access Strobe; CAS access time; Precharge interval; Row address select; Column address select; 1T DRAM; DDRAM; D-RAM; EDO DRAM; Fast page mode; Page mode memory; Extended Data Out RAM; BEDO RAM; Burst EDO; Multibank DRAM; Intel 1102; Burst EDO DRAM; Memory Timing; Dynamic Random Access Memory; FPRAM; Dynamic random access memory; Extended data out DRAM; Extended Data Out DRAM; Dynamic Random access memory; Static column RAM; Memory row; DRAM row; Row activation; WRAM (memory); 1T1C; 1t1c; 3T1C; Page mode RAM; Page mode DRAM; DRAM; D. R. A. M.; D.R.A.M.; DRAM memory; Asynchronous DRAM; EDO memory; Fast page mode DRAM; Window DRAM; Video DRAM; Nibble mode; EDO SGRAM
Multibank Dynamic Random Access Memory (Reference: RAM, DRAM, IC)

Wikipédia

Static random-access memory

Static random-access memory (static RAM or SRAM) is a type of random-access memory (RAM) that uses latching circuitry (flip-flop) to store each bit. SRAM is volatile memory; data is lost when power is removed.

The term static differentiates SRAM from DRAM (dynamic random-access memory) — SRAM will hold its data permanently in the presence of power, while data in DRAM decays in seconds and thus must be periodically refreshed. SRAM is faster than DRAM but it is more expensive in terms of silicon area and cost; it is typically used for the cache and internal registers of a CPU while DRAM is used for a computer's main memory.